Symbolic Simulation of Live Sequence Charts
No Thumbnail Available
Date
2003-07-01T00:00:00Z
Journal Title
Journal ISSN
Volume Title
Publisher
Abstract
Message Sequence Charts (MSC) have traditionally been used as a weak form of requirements specification in software design; they denote scenarios which may happen. Live Sequence Charts (LSC)extend Message Sequence Charts by also allowing the designer to specify scenarios which must happen. Live Sequence Chart specifications are executable; their simulation allows the designer to play out potentially aberrant scenarios prior to software construction. In this paper, we develop a simulation engine for Live Sequence Charts using CLP technology. The utility of (constraint) logic programming in this application stems from its ability to execute in presence of variables with non-ground values. This allows us to simulate multiple scenarios at one go. For example, several scenarios which only differ from each other in the value of a variable can be executed as a single scenario where the variable value is left uninstantiated. Similarly, we can simulate scenarios with an unbounded number of processes. We use the power of CLP(R) to also simulate charts with non-trivial timing constraints. Currently work on MSC/LSCs use symbolic variables mainly for ease of specification; they are ground during simulation. Thus, CLP technology advances the state-of-the-art in simulation and testing of MSC/LSC based requirements specifications.