Program Transformations for Predictable Cache Behavior

dc.contributor.authorHUYNH, Bach Khoaen_US
dc.contributor.authorJU, Leien_US
dc.contributor.authorCHATTOPADHYAY, Sudiptaen_US
dc.contributor.authorROYCHOUDHURY, Abhiken_US
dc.date.accessioned2009-05-25T06:47:26Zen_US
dc.date.accessioned2017-01-23T07:00:12Z
dc.date.available2009-05-25T06:47:26Zen_US
dc.date.available2017-01-23T07:00:12Z
dc.date.issued2009-05-25T06:47:26Zen_US
dc.description.abstractReal-time embedded software developers need to balance the dual (and seemingly conflicting) concerns of efficiency and predictability. Efficiency concerns are typically addressed by tuning the application and its underlying processing platform through a variety of techniques such as generating custom instructions in the instruction set, or configuring the processing platform. However, timing predictability remains a difficult goal to achieve, specifically in the presence of performance-enhancing micro-architectural features such as data caches. Presence of data caches can cause vast variation in the execution time for even programs with a single path. In this paper, we study a new approach to achieve predictable cache behavior (without large performance degradation) in data-intensive embedded applications. Our approach is to rewrite a given application into a “cache-efficient” style, where the data memory accesses are tracked and transformed to systematically reduce data cache conflicts. Our program transformation leads to lesser execution time variation in the transformed program (across program inputs as well as across cache configurations). We also develop a new Worst-case Execution Time (WCET) analysis method for data caches, and show that it leads to tighter WCET estimates for cache-efficient programs. Our experiments indicate that adopting the cache-efficient style of programming for data-intensive embedded software can help balance the dual concerns of efficiency and predictability.en_US
dc.format.extent644080 bytesen_US
dc.format.mimetypeapplication/pdfen_US
dc.identifier.urihttps://dl.comp.nus.edu.sg/xmlui/handle/1900.100/3039en_US
dc.language.isoenen_US
dc.relation.ispartofseriesTRA5/09en_US
dc.subjectTiming predictabilityen_US
dc.subjectTiming Analysisen_US
dc.subjectCache-efficient Algorithmsen_US
dc.titleProgram Transformations for Predictable Cache Behavioren_US
dc.typeTechnical Reporten_US
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